The photo-lithography process in semiconductor fabrication consists in duplicating desired circuit patterns as best as possible onto a semiconductor wafer. This process, shown in FIG. 1, is conventionally subdivided into three steps: exposure, develop, and etch. The exposure step projects the desired circuit patterns onto a film of photosensitive material commonly referred to as photoresist. The desired circuit patterns are typically represented as opaque (or translucent in some cases) and transparent regions on a template commonly called a photomask. Semiconductor circuits are then repeatedly reproduced from this template by a variety of techniques, among them projection being the most popular for mass production of semiconductor circuits due to its high throughput and relative low cost. In optical photolithography, patterns on the photomask template are duplicated onto the photoresist coated wafers by way of optical imaging through an exposure system. The images of these patterns interact with chemicals in the photoresist, creating latent images. The latent images are, typically, variations in concentration of chemical species which must be developed and, if necessary, transferred onto the wafer. This transferral process is accomplished by the develop and etch steps. In the former, a developer is utilized to discriminately dissolve the photoresist, creating patterns on the photoresist from the latent images which resemble the desired circuit patterns. This discrimination is made possible by the differentiation of dissolution rate due to variations in chemical concentration of the latent images. After developing the photoresist, the patterns are etched, if necessary, onto the wafer and the circuits are fabricated.
As shown in FIG. 2 and of relevance to the discussion to follow, the exposure step is typically divided into two sub-steps: the aerial image formation and the latent image formation previously described. The images that are formed by the exposure system of the photomask template before they interact with the photoresist are the aerial images. Since the template patterns typically have sharp transitions between opaque and clear regions (i.e., sharp corners), and keeping in mind that the exposure system can be viewed as a low pass (spatial frequency) filter, the aerial images resemble but do not exactly replicate the photomask pattern. The sharp edges of the original photomask, shown in more detail in FIG. 3, are distorted by the exposure system, resulting in rounded aerial images. It is important to predict the loss in pattern integrity via computer simulation for efficient process development and improved process latitude.
Aerial image simulators which compute the images generated by optical projection systems have proven to be a valuable tool to improve the state-of-the art in optical lithography for integrated circuit applications. Such simulators have recently found wide-spread application in advanced mask designs, e.g., phase-shifting mask (PSM) design, optical proximity correction (OPC) in automated inspection of PSMs and OPC masks, and in the design of projection optics, e.g., pupil and illumination filters. One of the main challenges to using model-based simulators in integrated circuit (IC) mask applications is the formidable size of the data representing a typical IC pattern. To illustrate this point and considering a moderately sized IC occupying 10 mm.times.10 mm of silicon with a minimum feature size of 0.25 um, a sparse sample spacing of 25 nm along each side immediately results in 1.6.times.10.sup.11 points to represent the image of the chip. Hence, it is extremely important in this application to minimize both the number of operations required to compute the image and the memory space needed.
Modeling aerial images has recently become a crucial component of semiconductor manufacturing. Since all steppers employ partially coherent illumination, such modeling is computationally intensive for all but elementary patterns. Known in the art is a spatial eigenvector decomposition computational method for calculating aerial images of integrated circuit masks produced by a partially coherent optical projection system. The method described relies on two tools to realize fast computation: 1) coherent decomposition of partially coherent imaging system models, as described by Y. C. Pati and T. Kailath in the article "Phase-shifting masks for microlithography: Automated design and mask requirements", published in the Journal of the Optical Society of America A, vol. 11, No. 9, pp. 2438-2453, 1994; and 2) the use of "basis" (or building block) images that are well-suited to describe integrated circuit patterns. Examples are submitted wherein aerial images are computed for large mask areas, typically of the order of 100 .mu.m.times.100 .mu.m.
One of the earliest aerial image simulation tools available is a software package known as SPLAT that was developed at the University of California by D. Lee and A. R. Neureuther et al., and fully described in SPLAT v5.0 User's Guide; Berkely Calif., University of California Press, March 1995. SPLAT computes aerial images by frequency domain integration using Hopkins approximation, well known to those skilled in the art. Although SPLAT has been extensively used in conventional lithography simulation, it is incapable of computing images of large masks in a reasonable amount of time. More recently, a number of faster commercial image simulators have been developed. These include, for example, FAIM, which was extended by E. Barouch, et al and described in the article "Vector Aerial Image with Off-Axis Illumination", published in SPIE, Vol. 1927, Optical/Laser Microlithography VI, pp. 686-708, 1993. However, as these are commercial products, no details are available as to the particular methods used to compute the images. The main drawback of SPLAT in IC lithography applications is the large computation time required for large mask areas because its computation time increases as the fourth power of the linear dimension.
The main computational advantage of the inventive method is realized by exploiting the structure inherent in IC pattern definitions, and also a (not so obvious) structure that can be extracted from a partially coherent imaging model. The structure of the image formation model is brought to bear on the problem through a decomposition of partially coherent imaging systems as the incoherent sum of coherent imaging systems, which was introduced by Pati and Kailath. This decomposition immediately reduces the computation to a (small) number of coherent image computations, in which the main factors of the computation are a matrix inversion and two-dimensional (2-D) convolutions. Further reduction in computation is achieved by using a structure of IC patterns to define a set of building blocks or basis functions from which any IC pattern can be constructed, and which is followed by producing images of IC patterns from the "pre-images" of the building blocks. The concept of exploiting the structure of IC patterns for fast image simulation for optical proximity correction (OPC) of masks is described by N. Cobb et al. in the article "Fast low-complexity mask design", published in the Proceedings of SPIE Microlithography Conference, February 1995, pp. 313-327. A key difference between the inventive method to be described hereinafter and the method described by N. Cobb et al. lies in the use of building block functions that have infinite support and which exploit the translation-invariance property of convolutions. The aforementioned prior art approach uses finitely supported rectangles, wherein each resizing of the rectangle must be handled individually, a distinct disadvantage. Other differences will be further elaborated hereinafter.